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PD - 96918A DIGITAL AUDIO MOSFET Features * Key parameters optimized for Class-D audio amplifier applications * Low RDSON for improved efficiency * Low QG and QSW for better THD and improved efficiency * Low QRR for better THD and lower EMI * 175C operating junction temperature for ruggedness * Can deliver up to 150W per channel into 4 load in half-bridge topology G S IRFB4212PBF Key Parameters 100 72.5 15 8.3 2.2 175 D VDS RDS(ON) typ. @ 10V Qg typ. Qsw typ. RG(int) typ. TJ max V m: nC nC C TO-220AB Description This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes the latest processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD and EMI. Additional features of this MOSFET are 175C operating junction temperature and repetitive avalanche capability. These features combine to make this MOSFET a highly efficient, robust and reliable device for ClassD audio amplifier applications. Absolute Maximum Ratings Parameter VDS VGS ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C PD @TC = 100C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current c Power Dissipation f Power Dissipation f Linear Derating Factor Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw 300 10lbxin (1.1Nxm) Max. 100 20 18 13 57 60 30 0.4 -55 to + 175 Units V A W W/C C Thermal Resistance Parameter RJC RCS RJA Junction-to-Case f Case-to-Sink, Flat, Greased Surface Junction-to-Ambient f Typ. --- 0.50 --- Max. 2.5 --- 62 C/W Units Notes through are on page 2 www.irf.com 1 9/16/05 IRFB4212PBF BV DSS V DSS/T J R DS(on) V GS(th) V GS(th)/T J IDSS IGSS g fs Qg Q gs1 Q gs2 Q gd Q godr Q sw R G(int) td(on) tr td(off) tf C iss C oss C rss C oss LD LS Electrical Characteristics @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Q gs2 + Q gd) Internal Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance Internal Drain Inductance Internal Source Inductance Min. 100 --- --- 3.0 --- --- --- --- --- 11 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. Max. Units --- 0.09 58 --- -13 --- --- --- --- --- 15 3.3 1.4 6.9 3.4 8.3 2.2 7.7 28 14 3.9 550 66 35 350 4.5 7.5 --- --- 72.5 5.0 --- 20 250 200 -200 --- 23 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- nH --- pF V GS = 0V V DS = 50V ns Conditions V GS = 0V, ID = 250A V GS = 10V, ID = 13A V m V mV/C A nA S V/C Reference to 25C, ID = 1mA e V DS = V GS, ID = 250A V DS = 100V, V GS = 0V V DS = 100V, V GS = 0V, T J = 125C V GS = 20V V GS = -20V V DS = 50V, ID = 13A V DS = 80V nC V GS = 10V ID = 13A See Fig. 6 and 19 V DD = 50V, V GS = 10VAe ID = 13A R G = 2.5 = 1.0MHz, Between lead, 6mm (0.25in.) from package See Fig.5 V GS = 0V, V DS = 0V to 80V D G S and center of die contact Avalanche Characteristics Parameter Typ. Max. Units mJ A mJ E AS IAR E AR Single Pulse Avalanche Energyd Avalanche CurrentAg Repetitive Avalanche Energy --- 25 g Min. --- --- --- --- --- --- --- --- 41 69 See Fig. 14, 15, 17a, 17b Diode Characteristics Parameter IS @ T C = 25C Continuous Source Current ISM V SD trr Q rr (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Typ. Max. Units 18 A 57 1.3 62 100 V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. T J = 25C, IS = 13A, V GS = 0V T J = 25C, IF = 13A di/dt = 100A/s e e Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.32mH, RG = 25, IAS = 13A. Pulse width 400s; duty cycle 2%. R is measured at TJ of approximately 90C. Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive avalanche information 2 www.irf.com IRFB4212PBF 100 TOP VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 100 TOP VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V ID, Drain-to-Source Current (A) BOTTOM ID, Drain-to-Source Current (A) BOTTOM 10 10 6.0V 6.0V 60s PULSE WIDTH Tj = 25C 1 0.1 1 10 100 60s PULSE WIDTH Tj = 175C 1 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 100.0 Fig 2. Typical Output Characteristics 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) ID = 13A 2.5 ID, Drain-to-Source Current() VGS = 10V 10.0 TJ = 175C 2.0 1.0 TJ = 25C 1.5 VDS = 50V 0.1 2 4 6 1.0 60s PULSE WIDTH 8 10 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature 20 VGS, Gate-to-Source Voltage (V) 10000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd ID= 13A VDS = 80V VDS= 50V VDS= 20V 16 C, Capacitance (pF) 1000 Ciss 12 Coss 100 8 Crss 4 10 1 10 100 0 0 5 10 15 20 25 QG Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs.Drain-to-Source Voltage www.irf.com Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage 3 IRFB4212PBF 100.0 1000 ID, Drain-to-Source Current (A) OPERATION IN THIS AREA LIMITED BY R DS (on) ISD , Reverse Drain Current (A) 100 100sec 10 1msec 1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10 10msec 10.0 TJ = 175C 1.0 TJ = 25C VGS = 0V 0.1 0.0 0.5 1.0 1.5 DC 100 1000 VSD , Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 20 Fig 8. Maximum Safe Operating Area 5.0 16 VGS(th) Gate threshold Voltage (V) ID , Drain Current (A) 4.0 12 ID = 250A 8 3.0 4 0 25 50 75 100 125 150 175 2.0 -75 -50 -25 0 25 50 75 100 125 150 175 TJ , Junction Temperature (C) TJ , Temperature ( C ) Fig 9. Maximum Drain Current vs. Case Temperature 10 Fig 10. Threshold Voltage vs. Temperature Thermal Response ( Z thJC ) 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 J J 1 0.1 R1 R1 2 R2 R2 R3 R3 3 R4 R4 C 4 Ri (C/W) 0.0489 0.3856 1.3513 0.7140 i (sec) 0.00000 0.000062 0.001117 0.013125 1 2 3 4 0.01 SINGLE PULSE ( THERMAL RESPONSE ) Ci= i/Ri Ci i/Ri Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 0.001 1E-006 1E-005 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 4 www.irf.com IRFB4212PBF RDS (on), Drain-to -Source On Resistance ( ) EAS, Single Pulse Avalanche Energy (mJ) 0.5 120 ID = 13A 0.4 100 ID 3.2A 5.7A BOTTOM 13A TOP 80 0.3 60 0.2 TJ = 125C 0.1 40 20 0.0 6 8 TJ = 25C 10 12 14 16 0 25 50 75 100 125 150 175 VGS, Gate-to-Source Voltage (V) Starting TJ, Junction Temperature (C) Fig 12. On-Resistance Vs. Gate Voltage 10 Fig 13. Maximum Avalanche Energy Vs. Drain Current Duty Cycle = Single Pulse 0.01 Avalanche Current (A) 0.05 1 0.10 Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current Vs.Pulsewidth 30 EAR , Avalanche Energy (mJ) 25 TOP Single Pulse BOTTOM 1% Duty Cycle ID = 13A 20 15 10 5 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (C) Fig 15. Maximum Avalanche Energy Vs. Temperature Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 17a, 17b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav www.irf.com 5 IRFB4212PBF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt - - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Curent Inductor Current Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V tp DRIVER VDS L RG VGS 20V D.U.T IAS tp + V - DD A 0.01 I AS Fig 17a. Unclamped Inductive Test Circuit LD VDS Fig 17b. Unclamped Inductive Waveforms + VDD D.U.T VGS Pulse Width < 1s Duty Factor < 0.1% 90% VDS 10% VGS td(on) tr td(off) tf Fig 18a. Switching Time Test Circuit Fig 18b. Switching Time Waveforms Id Vds Vgs L 0 DUT 1K VCC Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 19a. Gate Charge Test Circuit Fig 19b Gate Charge Waveform 6 www.irf.com IRFB4212PBF TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 AS SEMBLED ON WW 19, 2000 IN T HE AS S EMBLY LINE "C" Note: "P" in as s embly line pos ition indicates "Lead - Free" INTERNATIONAL RECT IFIER LOGO AS SEMBLY LOT CODE PART NUMBER DAT E CODE YEAR 0 = 2000 WEEK 19 LINE C TO-220AB packages are not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 9/05 www.irf.com 7 |
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